SSE4 instruction to improve CPU-GPU collaboration

[maroon1]

We already know that Intel's upcoming 45nm processors, code-named Penryn, will harbor a new instruction set called SSE4. The folks at ExtremeTech have now learned some details about an instruction in the SSE4 instruction set that may pave the way for integration between microprocessors and graphics processors. As the site explains, this "streaming load" instruction allows graphics data to bypass the processor's cache:

The streaming load instruction is a 16-byte aligned load instruction. But interestingly, the results are held in a temporary stream buffer that bypasses the normal cache hierarchy, a high-priority expressway that other data types haven't received. Intel identified the streaming-load instruction as ideal for GPU-CPU sharing, as well as imaging.

According to the lead architect on Penryn, Stephen Fischer, "This is an interesting instruction, as it opens the door to new areas of collaboration between CPU and the GPU." Fischer adds that the instruction "improves the read buffer from the GPU to the CPU by a factor of eight." ExtremeTech says that, when asked at a lunch panel whether the instruction was a response to AMD's "Fusion" integrated CPU-GPU, Fischer replied, "I could see where people would say that."

The Tech Report - SSE4 instruction to improve CPU-GPU collaboration

Is Intel's 'Penryn' Chip Hiding Graphics Support?

[hmammen]

Hm...would be kinda interesting considering the power of todays GPUs and if they were not bottlenecked by cache. If this is utilized in the production versions of the chips...we will have even faster clocks and our programs will run that much faster.....seems like its very good technology.

[Trotter]

"I could see where people would say that."

Who would have thunk it?

[hmammen]

LOL.....not like intel was cooking this up already though.

[Trotter]

Until Intel get rid of the FSB bottleneck, they will have a problem. Sounds like it is getting better, though.

[Apokalipse]

Originally Posted by Trotter

Until Intel get rid of the FSB bottleneck, they will have a problem. Sounds like it is getting better, though.

I am thinking HTT 3.0 will go well with graphics cards anyway

But then again, AMD's HTT goes well with anything

[vernong1992]

Originally Posted by Trotter

Until Intel get rid of the FSB bottleneck, they will have a problem. Sounds like it is getting better, though.

what FSB bottleneck? Elaborate plz

[Trotter]

Intel chips do not have on-die memory controllers, so they are limited by the speed of the FSB. Everything must pass through the chipset both ways. This is where AMD really made their speed difference known. Intel keeps raising the FSB, but it is still there.

If Intel has added an on-die mem controller I have not heard about it.

[zmatt]

i agree with trotter. thats their biggest shortcoming. you would think they would have figured that out by now.

[kobe24]

maybe u should tell them